Deperlify now on VLSI Tools

Deperlify (“De – Perl – ify”), the newest addition to the VLSI Tools family, is now up on the website thanks to some help from Dave Fick. Deperlify allows you to embed Perl blocks into your Verilog code, and a…

Adding Case Sensitivity to Calibre

One annoyance that has been plaguing me for quite some time is the case insensitivity that is default to Calibre (PEX, LVS, etc.).  The claim is that case sensitivity is a bad design practice (true), but that doesn’t mean that…

For most simulations I need to run, I try and avoid SKILL and OCEAN if at all possible.  I can usually achieve the same results easier and faster using Python.  Yesterday however, I decided to run a parametric transient analysis…

Forcing An Anchor To Download

In developing the VLSITools.com website, I ran across a problem when trying to make Python scripts available for download.  Whenever an anchor was clicked on that linked to a Python script, the server would try to execute it and dump…

OS X Update, X11, and XQuartz

I do all of my circuit design and layout as well as some software development by running X11 on a Macbook Pro that’s about 3-4 years old (Snow Leopard.) The basic flow involves logging in to a server at work…